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Hokkaido University Collection of Scholarly and Academic Papers >
Showing results 1 to 5 of 5
| Type | Author(s) | Title | Other Titles | Citation | Citation(alt) | Issue Date | | article | Asai, Shin'ichi; Ueno, Ken; Asai, Tetsuya; Amemiya, Yoshihito | High-Resistance Resistor Consisting of a Subthreshold CMOS Differential Pair | - | IEICE Transactions on Electronics | - | 1-Jun-2010 |
| article | Tsugita, Yusuke; Ueno, Ken; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, Yoshihito | An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs | - | IEICE Transactions on Electronics | - | 1-Jun-2010 |
| article | Ogawa, Taichi; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, Yoshihito | Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits | - | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | - | 1-Feb-2009 |
| article | Asai, Tetsuya; Kanazawa, Yusuke; Amemiya, Yoshihito | A subthreshold MOS neuron circuit based on the Volterra system | - | IEEE transactions on neural networks | - | Sep-2003 |
| proceedings (author version) | Kasai, Seiya; Amemiya, Yoshihito; Hasegawa, Hideki | GaAs Schottky Wrap-Gate Binary-Decision-Diagram Devices for Realization of Novel Single Electron Logic Architecture | - | - | - | 2000 |
Showing results 1 to 5 of 5
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