Carrier pocket engineering applied to "strained" Si/Ge superlattices to design useful thermoelectric materials

Koga, T.; Sun, X.; Cronin, S. B. et al.

Applied Physics Letters, 1999, 75(16), 2438-2440

Permalink : https://hdl.handle.net/2115/14677

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アクセス権	open access
URI	https://hdl.handle.net/2115/14677
タイトル	Carrier pocket engineering applied to "strained" Si/Ge superlattices to design useful thermoelectric materials
著者	Koga, T. ; Sun, X. ; Cronin, S. B. ; Dresselhaus, M. S.
e-Rad_Researcher 30374614 著者名 Koga, T.
著者名 Sun, X.
著者名 Cronin, S. B.
著者名 Dresselhaus, M. S.
言語	英語
発行日	1999-10-18
出版者	American Institute of Physics
収録物名	Applied Physics Letters
巻(号)	75(16)
ページ	2438-2440
抄録	The concept of carrier pocket engineering is applied to strained Si/Ge superlattices to obtain a large thermoelectric figure of merit ZT. In this system, the effect of the lattice strain at the Si/Ge interfaces provides another degree of freedom to control the conduction band structure of the superlattice. We explore various geometries and structures to optimize ZT for the whole three-dimensional superlattice. The resultant ZT, calculated for a symmetrized Si(20 Å)/Ge(20 Å) superlattice grown on a (111) oriented Si0.5Ge0.5 substrate, is 0.96 at 300 K and is shown to increase significantly at elevated temperatures. Such a superlattice can be grown using molecular beam epitaxy.
資源タイプ	学術雑誌論文
出版タイプ	Version of Record
権利情報	Copyright © 1999 American Institute of Physics
PISSN	0003-6951
EISSN	0003-6951
関連情報	URI http://apl.aip.org/apl/top.jsp
関連情報 (isIdenticalTo)	出版社版DOI https://doi.org/10.1063/1.125040