open access

https://hdl.handle.net/2115/30193

Formation of ultrathin SiNx∕Si interface control double layer on (001) and (111) GaAs surfaces for ex situ deposition of high-k dielectrics

英語

2007-07

AVS Science & Technology of Materials, Interfaces, and Processing

Journal of Vacuum Science & Technology B : Microelectronics and Nanometer Structures

25(4)

1481-1490

In order to realize pinning-free high-k dielectric metal-insulator-semiconductor (MIS) gate stack on (001) and (111)B oriented GaAs surfaces using the Si interface control layer (Si ICL) concept, formation of a SiNx/Si ICL double layer was investigated as a chemically stable structure on (001) and (111)B surfaces which allows ex situ deposition of HfO2 high-k dielectric films without losing the benefit of Si ICL. First, Si ICLs grown by molecular beam epitaxy (MBE) on (001) and (111)B GaAs surfaces with various initial surface reconstructions were investigated in detail by reflection high energy electron diffraction and x-ray photoelectron spectroscopy (XPS) investigations at each step of the interface formation. Large shifts of the surface Fermi level position toward unpinning were observed after Si ICL growth on appropriately formed Ga-stabilized surfaces. It was found that Si layers grow epitaxially with Si–Ga bonds at the Si/GaAs interface and Si–As termination on top, suggesting surfactant roles played by As atoms. Then, an ultrathin SiNx buffer film was formed on the Si ICL by its in situ partial nitridation in the MBE chamber. An XPS analysis of the resultant SiNx/Si ICL double layer formed on (001) and (111)B surface indicated that the structure is chemically stable against air exposure on both surfaces in the sense that it prevents the host GaAs surface from subcutaneous oxidation, although SiNx film itself partially turns into SiOxNy. Finally, high-k MIS capacitors were formed by ex situ deposition of HfO2 on the SiNx/Si ICL/GaAs structure after transferring the sample through air. The capacitance-voltage (C-V) analysis indicated that the MIS interface is completely pinning-free with a minimum interface state density in the range of low 1011 cm−2 eV−1. ©2007 American Vacuum Society

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©2007 American Vacuum Society

0734-211X