open access

https://hdl.handle.net/2115/39787

Fast SPT-Term Allocation and Efficient FPGA Implementation of FIR Filters for Software Defined Radio Applications

英語

2009-10-04

Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference, International Organizing Committee

Proceedings : APSIPA ASC 2009 : Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference

680-683

APSIPA ASC 2009: Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference. 4-7 October 2009. Sapporo, Japan. Poster session: Signal Processing and Implementations in Communications (6 October 2009).

This paper presents a fast SPT-term allocation scheme and an efficient FPGA implementation of FIR filters for Software Defined Radio (SDR) applications. Direct conversion method based on RF direct sampling is nowadays widely used in SDR applications. Fast and accurate digital filters are required for RF direct sampling and processing in direct conversion, however such filters often require large digital circuit area. Signed-Power-of-Two (SPT) terms will be suitable for fast processing and efficient implementation of FIR filters. This paper first aims at developing a fast SPT-term allocation scheme for designing FIR filters, and then tries to efficiently implement FIR filters on FPGA. Performance of SPT-term allocation and FPGA implementation is evaluated through computer simulation and hardware implementation.

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