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Multiplierless Refinement Scheme for Interval Calculation of GMM-based Classification

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Please use this identifier to cite or link to this item:http://hdl.handle.net/2115/39692

Title: Multiplierless Refinement Scheme for Interval Calculation of GMM-based Classification
Authors: Watanabe, Hidenori Browse this author
Muramatsu, Shogo Browse this author
Kikuchi, Hisakazu Browse this author
Issue Date: 4-Oct-2009
Publisher: Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference, International Organizing Committee
Journal Title: Proceedings : APSIPA ASC 2009 : Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference
Start Page: 282
End Page: 285
Abstract: In this work, an efficient refinement scheme is proposed for interval calculation of GMM-based classification. The proposed refinement scheme reduces the circuit area and accelerates the throughput from the original. The proposed scheme consists of scaling for the exponential part and shifting of precalculated values of the fractional part. As a result, the refinement process can be constructed with a multiplierless architecture. An experimental implementation on FPGA shows that the proposed method reduces the circuit area under 52.2% and accelerates the throughput over 117.6% from the architecture with the original interval refinement process.
Description: APSIPA ASC 2009: Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference. 4-7 October 2009. Sapporo, Japan. Poster session: Advanced Circuits and Systems/VLSI (5 October 2009).
Conference Name: APSIPA ASC 2009: Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference
2009年アジア太平洋信号情報処理連合学会アニュアルサミット・国際会議
Conference Place: Sapporo
Type: proceedings
URI: http://hdl.handle.net/2115/39692
Appears in Collections:北海道大学サステナビリティ・ウィーク2009 (Sustainability Weeks 2009) > 2009年アジア太平洋信号情報処理連合学会アニュアルサミット・国際会議 (2009 APSIPA Annual Summit and Conference)

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