|
Hokkaido University Collection of Scholarly and Academic Papers >
Hokkaido University Sustainability Weeks >
Sustainability Weeks 2009 >
2009 APSIPA Annual Summit and Conference >
Performance Evaluation of an Emerging Stream Cipher Engine
| Title: | Performance Evaluation of an Emerging Stream Cipher Engine |
| Authors: | Fukase, Masa-aki Browse this author | | Sato, Tomoaki Browse this author |
| Issue Date: | 4-Oct-2009 |
| Publisher: | Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference, International Organizing Committee |
| Journal Title: | Proceedings : APSIPA ASC 2009 : Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference |
| Start Page: | 583 |
| End Page: | 588 |
| Abstract: | Considering the overall characteristics of ubiquitous environment, a practical solution of ubiquitous security is not to achieve ideally strong strength but to achieve temporary strength without relying on permanent network infrastructure. According to this concept, the authors have exploited a multimedia stream cipher engine. This is a safety aware, high-performed single chip processor. In order to keep security, usability, speed, and power consciousness, the stream cipher engine takes a compact multicore architecture. Each core implements a double cipher scheme that covers RAC (random addressing cryptography) and data sealing. The double cipher is microarchitecture-based, software-transparent hardware cryptography that offers the protection of the whole data with negligible hardware cost and moderate performance overhead. The double cipher increases cipher strength as the expansion of key length or the cycle of random numbers. Although the hardware implementation of longer cycle random number generation is very easy, it surely involves the power consuming increase of the size of a stream buffer or register file. Based on the previous implementation of the stream cipher engine chip by using 0.18-μm standard cell CMOS technology, this paper explores the tradeoff between cipher strength and buffer size. From the logic synthesis by using Synopsys Design Compiler, power dissipation, clock speed, running time, and throughput are studied. The cipher streaming buffer size dependency of these speculative factors achieves the guideline of optimum buffer size in view of cipher strength, power dissipation and throughput for ubiquitous computing. |
| Description: | APSIPA ASC 2009: Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference. 4-7 October 2009. Sapporo, Japan. Oral session: Information Forensics and Security (6 October 2009). |
| Conference Name: | APSIPA ASC 2009: Asia-Pacific Signal and Information Processing Association, 2009 Annual Summit and Conference | | 2009年アジア太平洋信号情報処理連合学会アニュアルサミット・国際会議 |
| Conference Place: | Sapporo |
| Type: | proceedings |
| URI: | http://hdl.handle.net/2115/39766 |
| Appears in Collections: | 北海道大学サステナビリティ・ウィーク2009 (Sustainability Weeks 2009) > 2009年アジア太平洋信号情報処理連合学会アニュアルサミット・国際会議 (2009 APSIPA Annual Summit and Conference)
|
|
