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Hokkaido University Collection of Scholarly and Academic Papers >
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Peer-reviewed Journal Articles, etc >
Optimization and Interface Characterization of a Novel Oxide-Free Insulated Gate Structure for InP Having an Ultrathin Silicon Interface Control Layer
| Title: | Optimization and Interface Characterization of a Novel Oxide-Free Insulated Gate Structure for InP Having an Ultrathin Silicon Interface Control Layer |
| Authors: | Fu, Zhengwen Browse this author | | Takahashi, Hiroshi Browse this author | | Kasai, Seiya Browse this author | | Hasegawa, Hideki Browse this author |
| Keywords: | InP | | InGaAs | | surface passivation | | MISFET | | XPS | | UHV contactless C-V |
| Issue Date: | Feb-2002 |
| Publisher: | Japan Society of Applied Physics |
| Journal Title: | Japanese Journal of Applied Physics. Pt. 1, Regular papers, short notes & review papers |
| Volume: | 41 |
| Issue: | 2B |
| Start Page: | 1062 |
| End Page: | 1066 |
| Publisher DOI: | 10.1143/JJAP.41.1062 |
| Abstract: | Attempts were made to characterize and optimize the novel oxide-free insulated gate structure for InP, having an ultrathin Si interface control layer (Si ICL). An in situ X-ray photoelectron spectroscopy (XPS) study indicated that P deficiency took place on the InP surface by the irradiation of a high-energy Si beam during the MBE growth of Si ICL. Based on this, a modified gate structure having an In0.53Ga0.47As cap layer on the InP surface for prevention of phosphorus loss was proposed and its interface properties were investigated. A careful design for quantum state control indicated that the Si ICL thickness should be reduced down to 0.5 nm for the InGaAs cap thickness of 3 nm. In situ XPS spectra showed that no pronounced desorption of As or P took place from the surface in the new gate structure. In situ contactless C-V measurement showed a low and wide interface state density distribution with a minimum of 2×1011 cm-2eV-1. An InP MISFET test device with a gate length of 2 μm exhibited a maximum gm of 123 mS/mm and a high drain current of 389 mA/mm. These results indicated the effectiveness of the novel oxide-free insulated gate structure for application to InP power MISFETs as well as to surface passivation. |
| Rights: | Copyright © 2002 The Japan Society of Applied Physics |
| Type: | article (author version) |
| URI: | http://hdl.handle.net/2115/33077 |
| Appears in Collections: | 情報科学院・情報科学研究院 (Graduate School of Information Science and Technology / Faculty of Information Science and Technology) > 雑誌発表論文等 (Peer-reviewed Journal Articles, etc)
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Submitter: 葛西 誠也
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