Hokkaido University Collection of Scholarly and Academic Papers >
Graduate School of Information Science and Technology / Faculty of Information Science and Technology >
Peer-reviewed Journal Articles, etc >
One electron-controlled multiple-valued dynamic random-access-memory
This item is licensed under:Creative Commons Attribution 3.0 Unported
Title: | One electron-controlled multiple-valued dynamic random-access-memory |
Authors: | Kye, H. W. Browse this author | Song, B. N. Browse this author | Lee, S. E. Browse this author | Kim, J. S. Browse this author | Shin, S. J. Browse this author | Choi, J. B. Browse this author | Yu, Y. -S. Browse this author | Takahashi, Y. Browse this author →KAKEN DB |
Keywords: | Capacitors | Charged currents | Leakage currents | MOSFETs |
Issue Date: | Feb-2016 |
Publisher: | American Institute of Physics (AIP) |
Journal Title: | AIP Advances |
Volume: | 6 |
Issue: | 2 |
Start Page: | 025320-1 |
End Page: | 025320-5 |
Publisher DOI: | 10.1063/1.4942901 |
Abstract: | We propose a new architecture for a dynamic random-access-memory (DRAM) capable of storing multiple values by using a single-electron transistor (SET). The gate of a SET is designed to be connected to a plurality of DRAM unit cells that are arrayed at intersections of word lines and bitlines. In this SET-DRAM hybrid scheme, the multiple switching characteristics of SET enables multiple value data stored in a DRAM unit cell, and this increases the storage functionality of the device. Moreover, since refreshing data requires only a small amount of SET driving current, this enables device operating with low standby power consumption. (C) 2016 Author(s). |
Rights: | http://creativecommons.org/licenses/by/3.0/ |
Type: | article |
URI: | http://hdl.handle.net/2115/61449 |
Appears in Collections: | 情報科学院・情報科学研究院 (Graduate School of Information Science and Technology / Faculty of Information Science and Technology) > 雑誌発表論文等 (Peer-reviewed Journal Articles, etc)
|
Submitter: 高橋 庸夫
|