HUSCAP logo Hokkaido Univ. logo

Hokkaido University Collection of Scholarly and Academic Papers >
Graduate School of Information Science and Technology / Faculty of Information Science and Technology >
Peer-reviewed Journal Articles, etc >

Advances in Steep-Slope Tunnel FETs

Files in This Item:
ESSDERC2016 - TOMIOKA.pdf764.06 kBPDFView/Open
Please use this identifier to cite or link to this item:http://hdl.handle.net/2115/64541

Title: Advances in Steep-Slope Tunnel FETs
Authors: Tomioka, Katsuhiro Browse this author →KAKEN DB
Motohisa, Junichi Browse this author →KAKEN DB
Fukui, Takashi Browse this author →KAKEN DB
Keywords: Tunneling FET
III-V compound semiconductors
nanowires
heterojunction
Issue Date: Sep-2016
Publisher: IEEE (Institute of Electrical and Electronics Engineers)
Citation: 2016 46th European Solid-State Device Research Conference (ESSDERC),978-1-5090-2969-3
Start Page: 397
End Page: 402
Publisher DOI: 10.1109/ESSDERC.2016.7599670
Abstract: Tunnel FETs (TFETs) with steep subthreshold slope have been attracting much attention as building blocks for future low-power integrated circuits and CMOS technology devices. Here we report on recent advances in vertical TFETs using III-V/Si heterojunctions. These heterojunctions, which are formed by direct integration of III-V nanowires (NWs) on Si, are promising tunnel junction for achieving steep subthreshold slope (SS). The III-V/Si heterojunction inherently forms abrupt junctions regardless of precise doping technique because the band discontinuity is determined by only the offset of III-V and Si, and depletion region can be controlled by the III-V MOS structure. Thus, good gate-electrostatic control with a large internal electrical field for modulation of tunnel transport can be achieved. Here we repot on recent advances in the vertical TFETs using the III-V NW/Si heterojunction with surrounding-gate architecture and demonstrate steep-SS behavior and very low parasitic leakage current.
Conference Name: European Solid-State Device Research Conference (ESSDERC)
Conference Sequence: 46
Conference Place: Lausanne
Rights: © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Type: proceedings (author version)
URI: http://hdl.handle.net/2115/64541
Appears in Collections:情報科学院・情報科学研究院 (Graduate School of Information Science and Technology / Faculty of Information Science and Technology) > 雑誌発表論文等 (Peer-reviewed Journal Articles, etc)

Submitter: 冨岡 克広

Export metadata:

OAI-PMH ( junii2 , jpcoar )

MathJax is now OFF:


 

 - Hokkaido University