InGaAs-InP core-shell nanowire/Si junction for vertical tunnel field-effect transistor

Tomioka, Katsuhiro; Ishizaka, Fumiya; Motohisa, Junichi; Fukui, Takashi

doi:10.1063/5.0014565


Hokkaido University \| Library \| HUSCAP	Advanced Search		言語

	Home
	About HUSCAP
	オープンアクセス方針

	Browse by Author

Browse
	Communities & Collections

	Scholarly Journals
	Theses
	Doctoral Dissertations Listed by Graduate Schools
	Conference Procs.
	Events

	HUSCAP Senior (in Japanese)

	Societies

	Top 50 Papers (last 1 month)
	Downloads (country)

For university staff (in Japanese)
	How to post your papers to HUSCAP (in Japanese)

Open Archives Compliant

You can search our collection also at:
	Google
	Google Scholar
	CiNii
	IRDB
	OAIster
	NDLTD

Hokkaido University Collection of Scholarly and Academic Papers >
Graduate School of Information Science and Technology / Faculty of Information Science and Technology >
Peer-reviewed Journal Articles, etc >

InGaAs-InP core-shell nanowire/Si junction for vertical tunnel field-effect transistor

This item is licensed under: Creative Commons Attribution 4.0 International

Files in This Item:

The file(s) associated with this item can be obtained from the following URL:https://doi.org/10.1063/5.0014565

Title:	InGaAs-InP core-shell nanowire/Si junction for vertical tunnel field-effect transistor
Authors:	Tomioka, Katsuhiro Browse this author →KAKEN DB
	Ishizaka, Fumiya Browse this author
	Motohisa, Junichi Browse this author →KAKEN DB
	Fukui, Takashi Browse this author →KAKEN DB
Issue Date:	21-Sep-2020
Publisher:	American Institute of Physics (AIP)
Journal Title:	Applied physics letters
Volume:	117
Issue:	12
Start Page:	123501
Publisher DOI:	10.1063/5.0014565
Abstract:	Tunnel field-effect transistors (TFETs) have attracted much attention as building blocks for low-power integrated circuits because they can lower the subthreshold slope (SS) below the physical limitation of conventional FETs. There, however, remains a difficulty in increasing the tunnel current in TFETs since the energy gap at the tunnel junction has a unique probability. Here, we investigated the strain effect stemming from the InGaAs-InP core-shell (CS) structure on the tunneling current in a vertical TFET using an InGaAs nanowire (NW)/Si heterojunction. We found that the TFET demonstrated a 10-fold enhancement in current while achieving a steep SS (minimum SS=41mV/dec). Strain analysis for the InGaAs NW/Si tunnel junction revealed that specific strain induced at the junction affected the increase in the on-state current.
Rights:	This article may be downloaded for personal use only. Any other use requires prior permission of the author and AIP Publishing. This article appeared in Applied physics letters and may be found at https://aip.scitation.org/doi/abs/10.1063/5.0014565.
	Copyright 2020 Author(s). This article is distributed under a Creative Commons Attribution (CC BY) License.
	https://creativecommons.org/licenses/by/4.0/
Type:	article
URI:	http://hdl.handle.net/2115/79716
Appears in Collections:	情報科学院・情報科学研究院 (Graduate School of Information Science and Technology / Faculty of Information Science and Technology) > 雑誌発表論文等 (Peer-reviewed Journal Articles, etc)

OAI-PMH ( junii2 , jpcoar )

- Hokkaido University