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Hexagonal Binary Decision Diagram Quantum Circuit Approach for Ultra-Low Power III-V Quantum LSIs

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Please use this identifier to cite or link to this item:http://hdl.handle.net/2115/14550

Title: Hexagonal Binary Decision Diagram Quantum Circuit Approach for Ultra-Low Power III-V Quantum LSIs
Authors: HASEGAWA, Hideki Browse this author
KASAI, Seiya Browse this author →KAKEN DB
SATO, Taketomo Browse this author →KAKEN DB
Keywords: quantum LSI
quantum devices
binary decision diagram (BDD)
nanostructure network
intelligent quantum (IQ) chip
Issue Date: Oct-2004
Publisher: IEICE
Journal Title: IEICE TRANSACTIONS on Electronics
Volume: E87-C
Issue: 11
Start Page: 1757
End Page: 1768
Abstract: A new approach for ultra-low-power LSIs based on quantum devices is presented and its present status and critical issues are discussed with a brief background review on the semiconductor nanotechnology. It is a hexagonal binary decision diagram (BDD) quantum logic circuit approach suitable for realization of ultra-low-power logic/memory circuits to be used in new applications such as intelligent quantum (IQ) chips embedded in the ubiquitous network environment. The basic concept of the approach, circuit examples showing its feasibility, growth of high density nanostructure networks by molecular beam epitaxy (MBE) for future LSI implementation, and the key processing issues including the device isolation issue are addressed.
Rights: Copyright (c) 2004 IEICE (許諾番号 : 06RB0100)
Relation: http://search.ieice.org/
Type: article
URI: http://hdl.handle.net/2115/14550
Appears in Collections:情報科学院・情報科学研究院 (Graduate School of Information Science and Technology / Faculty of Information Science and Technology) > 雑誌発表論文等 (Peer-reviewed Journal Articles, etc)

Submitter: 葛西 誠也

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