Carrier pocket engineering applied to "strained" Si/Ge superlattices to design useful thermoelectric materials


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Please use this identifier to cite or link to this item:http://hdl.handle.net/2115/14677

Title:	Carrier pocket engineering applied to "strained" Si/Ge superlattices to design useful thermoelectric materials
Authors:	Koga, T. Browse this author →KAKEN DB
	Sun, X. Browse this author
	Cronin, S. B. Browse this author
	Dresselhaus, M. S. Browse this author
Issue Date:	18-Oct-1999
Publisher:	American Institute of Physics
Journal Title:	Applied Physics Letters
Volume:	75
Issue:	16
Start Page:	2438
End Page:	2440
Publisher DOI:	10.1063/1.125040
Abstract:	The concept of carrier pocket engineering is applied to strained Si/Ge superlattices to obtain a large thermoelectric figure of merit ZT. In this system, the effect of the lattice strain at the Si/Ge interfaces provides another degree of freedom to control the conduction band structure of the superlattice. We explore various geometries and structures to optimize ZT for the whole three-dimensional superlattice. The resultant ZT, calculated for a symmetrized Si(20 Å)/Ge(20 Å) superlattice grown on a (111) oriented Si0.5Ge0.5 substrate, is 0.96 at 300 K and is shown to increase significantly at elevated temperatures. Such a superlattice can be grown using molecular beam epitaxy.
Rights:	Copyright © 1999 American Institute of Physics
Relation:	http://apl.aip.org/apl/top.jsp
Type:	article
URI:	http://hdl.handle.net/2115/14677
Appears in Collections:	情報科学院・情報科学研究院 (Graduate School of Information Science and Technology / Faculty of Information Science and Technology) > 雑誌発表論文等 (Peer-reviewed Journal Articles, etc)

Submitter: 古賀貴亮

OAI-PMH ( junii2 , jpcoar_1.0 )

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