A three-valued D-flip-flop and shift register using multiple-junction surface tunnel transistors


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Please use this identifier to cite or link to this item:http://hdl.handle.net/2115/5577

Title:	A three-valued D-flip-flop and shift register using multiple-junction surface tunnel transistors
Authors:	Uemura, T.¹ Browse this author →KAKEN DB
Authors:	Baba, T. Browse this author
Authors(alt):	植村, 哲也¹
Issue Date:	Aug-2002
Publisher:	IEEE
Journal Title:	IEEE Transactions on Electron Devices
Volume:	49
Issue:	8
Start Page:	1336
End Page:	1340
Publisher DOI:	10.1109/TED.2002.801431
Abstract:	A three-valued D-flip-flop (D-FF) circuit and a two-stage shift register built from InGaAs-based multiple-junction surface tunnel transistors (MJSTT) and Si-based metal-oxide-semiconductor field effect transistors (MOSFET) have been demonstrated. Due to the combination of the MJSTTs latching function and the MOSFETs switching function, the number of devices required for the D-FF circuit was greatly reduced to three from the thirty required for the FET-only circuit.
Rights:	Copyright © 2002 American Institute of Physics
Relation:	http://www.aip.org/
Type:	article
URI:	http://hdl.handle.net/2115/5577
Appears in Collections:	情報科学院・情報科学研究院 (Graduate School of Information Science and Technology / Faculty of Information Science and Technology) > 雑誌発表論文等 (Peer-reviewed Journal Articles, etc)

Submitter: 植村哲也

OAI-PMH ( junii2 , jpcoar_1.0 )

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