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Design and Implementation of Ultra-Small-Size and Ultra-Low-Power Digital Systems on GaAs-based Hexagonal Nanowire Networks Utilizing a Hexagonal BDD Quantum Circuit Approach

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タイトル: Design and Implementation of Ultra-Small-Size and Ultra-Low-Power Digital Systems on GaAs-based Hexagonal Nanowire Networks Utilizing a Hexagonal BDD Quantum Circuit Approach
著者: Kasai, S. 著作を一覧する
Yumoto, M. 著作を一覧する
Sato, T. 著作を一覧する
Hasegawa, H. 著作を一覧する
発行日: 2004年
出版者: The Electrochemical Society
引用: Nanoscale Devices, Materials, and Biological Systems: Fundamental and Applications
誌名: ECS Proceeding
巻: 2004-13
開始ページ: 125
終了ページ: 146
抄録: This paper discusses feasibility of design and future implementation of ultrasmall-size and ultra-low-power digital logic systems by a hexagonal BDD (binary-decision diagram) quantum circuit approach. The discussion is based on various circuits formed on GaAs-based hexagonal nanowire networks controlled by nanometer scale Schottky wrap gates (WPGs). Starting from basic node devices and elementary logic function blocks, fabrication technology of hexagonal BDD quantum circuits up to 8-bit adders with node densities over 45 million nodes/cm2 has been successfully developed. Their correct operations at low temperatures and room temperature have been confirmed by experiments and simulation. Various circuit components in logic processors, including arithmetic logic unit (ALU), controller and decoders have been successfully designed as hexagonal BDD layouts without nanowire crossover. For sequential circuits, WPG-controlled nanowire FETs on hexagonal networks have been investigated, and registers and counters have been implemented using these nanowire FETs showing correct operation. Hexagonal BDD-based static 2-bit nano-processor unit (NPU) has been successfully designed completely on hexagonal nanowire network. Ultra high-density GaAs hexagonal nanowire networks with much smaller wire sizes than those of etched nanowire networks have been successfully formed by selective MBE growth, showing great promise for room temperature operation in quantum regime as well as reduction of system area and power consumption.
Rights: (C) The Electrochemical Society, Inc. 2004. All rights reserved. Except as provided under U.S. copyright law, this work may not be reproduced, resold, distributed, or modified without the express permission of The Electrochemical Society (ECS). The archival version of this work was published in ECS Proceeding, 2004-13, 125-146 (2004)
資料タイプ: proceedings (author version)
URI: http://hdl.handle.net/2115/8368
出現コレクション:雑誌発表論文等 (Peer-reviewed Journal Articles, etc)

提供者: 葛西 誠也

 

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