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TypeAuthor(s)TitleOther TitlesCitationCitation(alt)Issue Date
articleTsugita, Yusuke; Ueno, Ken; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoAn On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs-IEICE Transactions on Electronics-1-Jun-2010
articleUeno, Ken; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoA 300 nW, 15 ppm/℃, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETsA 300 nW, 15 ppm/degC, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETsIEEE Journal of Solid-State Circuits-Jul-2009
articleOgawa, Taichi; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoThreshold-Logic Devices Consisting of Subthreshold CMOS Circuits-IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences-1-Feb-2009
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