HUSCAP logo Hokkaido Univ. logo

Hokkaido University Collection of Scholarly and Academic Papers >

Sort by: In order: Results/Page Authors/Record:
Export metadata:
Showing results 1 to 15 of 15
TypeAuthor(s)TitleOther TitlesCitationCitation(alt)Issue Date
articleKan, Shaohua; Nakajima, Kohei; Takeshima, Yuki; Asai, Tetsuya; Kuwahara, Yuji; Akai-Kasaya, MegumiSimple Reservoir Computing Capitalizing on the Nonlinear Response of Materials: Theory and Physical Implementations-Physical review applied-12-Feb-2021
articleHagiwara, Naruki; Sekizaki, Shoma; Kuwahara, Yuji; Asai, Tetsuya; Akai-Kasaya, MegumiLong- and Short-Term Conductance Control of Artificial Polymer Wire Synapses-Polymers-Jan-2021
article (author version)Akai-Kasaya, Megumi; Hagiwara, Naruki; Hikita, Wataru; Okada, Masaru; Sugito, Yasumasa; Kuwahara, Yuji; Asai, TetsuyaEvolving conductive polymer neural networks on wetware-Japanese Journal of Applied Physics (JJAP)-1-Jun-2020
articleYamamoto, Kasho; Ikebe, Masayuki; Asai, Tetsuya; Motomura, Masato; Takamaeda, ShinyaFPGA-Based Annealing Processor with Time-Division Multiplexing-IEICE transactions on information and systems-Dec-2019
articleKaneko, Tatsuya; Orimo, Kentaro; Hida, Itaru; Takamaeda, Shinya; Ikebe, Masayuki; Motomura, Masato; Asai, TetsuyaA study on a low power optimization algorithm for an edge-AI device-Nonlinear theory and its applications, IEICE-Oct-2019
articleHida, Itaru; Takamaeda-Yamazaki, Shinya; Ikebe, Masayuki; Motomura, Masato; Asai, TetsuyaAn energy-efficient dynamic branch predictor with a two-clock-cycle naive Bayes classifier for pipelined RISC microprocessors-Nonlinear Theory and Its Applications, IEICE-2017
articleUeno, Ken; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoA1-μW 600-ppm/℃ Current Reference Circuit Consisting of Subthreshold CMOS Circuits-IEEE Transactions on Circuits and Systems II : Express Briefs-Sep-2010
articleAsai, Shin'ichi; Ueno, Ken; Asai, Tetsuya; Amemiya, YoshihitoHigh-Resistance Resistor Consisting of a Subthreshold CMOS Differential Pair-IEICE Transactions on Electronics-1-Jun-2010
articleUeno, Ken; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoLow-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques-IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences-1-Dec-2009
article (author version)Kasai, Seiya; Asai, TetsuyaStochastic Resonance in Schottky Wrap Gate-controlled GaAs Nanowire Field-Effect Transistors and Their Networks-Applied Physics Express-25-Aug-2008
article (author version)Hirose, T.; Asai, T.; Amemiya, Y.Pulsed neural networks consisting of single-flux-quantum spiking neurons-Physica C : Superconductivity-1-Oct-2007
articleUeno, K.; Hirose, T.; Asai, T.; Amemiya, Y.CMOS Smart Sensor for Monitoring the Quality of Perishables-IEEE Journal of Solid-State Circuits-Apr-2007
article (author version)Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoSpiking neuron devices consisting of single-flux-quantum circuits-Physica C: Superconductivity-1-Oct-2006
articleAsai, Tetsuya; Kanazawa, Yusuke; Amemiya, YoshihitoA subthreshold MOS neuron circuit based on the Volterra system-IEEE transactions on neural networks-Sep-2003
articleAsai, Tetsuya; Ohtani, Masashiro; Yonezu, HirooAnalog integrated circuits for the Lotka-Volterra competitive neural networks-IEEE Transactions on Neural Networks-Sep-1999
Showing results 1 to 15 of 15


Hokkaido University