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Showing results 1 to 7 of 7
TypeAuthor(s)TitleOther TitlesCitationCitation(alt)Issue Date
articleKato, Aitaro; Sakai, Shinichi; Iidaka, Takashi; Iwasaki, Takaya; Kurashimo, Eiji; Igarashi, Toshihiro; Hirata, Naoshi; Kanazawa, Toshihiko; Katsumata, Kei; Takahashi, Hiroaki; Honda, Ryo; Maeda, Takahiro; Ichiyanagi, Masayoshi; Yamaguchi, Teruhiro; Kosuga, Masahiro; Okada, Tomomi; Nakajima, Junichi; Hori, Shuichiro; Nakayama, Takashi; Hasegawa, Akira; Kono, Toshio; Suzuki, Syuichi; Tsumura, Noriko; Hiramatsu, Yoshihiro; Sugaya, Katsunori; Hayashi, Aiko; Hirose, Tetsuya; Sawada, Akihiro; Tanaka, Keisuke; Yamanaka, Yoshiko; Nakamichi, Haruhisa; Okuda, Takashi; Iio, Yoshihisa; Nishigami, Kin'ya; Miyazawa, Masatoshi; Wada, Hiroo; Hirano, Norio; Katao, Hiroshi; Ohmi, Shiro; Ito, Kiyoshi; Doi, Issei; Noda, Shunta; Matsumoto, Satoshi; Matsushima, Takeshi; Saiga, Atsushi; Miyamachi, Hiroki; Imanishi, Kazutoshi; Takeda, Tetsuya; Asano, Youichi; Yukutake, Yohei; Ueno, Tomotake; Maeda, Takuto; Matsuzawa, Takanori; Sekine, Shutaro; Matsubara, Makoto; Obara, KazushigeAnomalous depth dependency of the stress field in the 2007 Noto Hanto, Japan, earthquake: Potential involvement of a deep fluid reservoir-Geophysical Research Letters-Mar-2011
articleUeno, Ken; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoA1-μW 600-ppm/℃ Current Reference Circuit Consisting of Subthreshold CMOS Circuits-IEEE Transactions on Circuits and Systems II : Express Briefs-Sep-2010
articleTsugita, Yusuke; Ueno, Ken; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoAn On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs-IEICE Transactions on Electronics-1-Jun-2010
articleUeno, Ken; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoLow-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques-IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences-1-Dec-2009
articleUeno, Ken; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoA 300 nW, 15 ppm/℃, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETsA 300 nW, 15 ppm/degC, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETsIEEE Journal of Solid-State Circuits-Jul-2009
articleOgawa, Taichi; Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoThreshold-Logic Devices Consisting of Subthreshold CMOS Circuits-IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences-1-Feb-2009
article (author version)Hirose, Tetsuya; Asai, Tetsuya; Amemiya, YoshihitoSpiking neuron devices consisting of single-flux-quantum circuits-Physica C: Superconductivity-1-Oct-2006
Showing results 1 to 7 of 7

 

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